XXXI International Mineral Processing Congress 2024 Proceedings/Washington, DC/Sep 29–Oct 3 3899
close to lower limits. The three parameters in design: S01
Deck 1 Aperture, B01 Capacity and B03 Capacity are var-
ied to improve circuit performance.
Design of Experiment for Interlock Study
Based on the baseline study, a three-factor Design of
Experiment (DoE) was performed to study the bin capacity
(B02 and B03) in conjunction with the screen S01 deck
1 aperture, see Table 2. The bin capacities are set to two
levels with reference to the nominal capacities while the
S01 Deck1 aperture is set at three levels. The output of
interest is the mass flow at different parts of the circuit and
the capacity utilization (U) of the equipment with reference
capacity values.
It can be observed in Table 2, that the maximum cir-
cuit output (highlighted in green) is a function of the
combination of the increasing combined utilization
of both crusher CR01 and CR02 or decreasing the
difference between the utilization of crusher CR01
and CR02. The utilization in turn is highly depen-
dent on the cut-point on the screen S01 deck 1 aper-
ture while the bin capacities have limited impact on
the averaged mass flow for the operation of 24 hours.
In essence, the cut-point of the screen is changing
the mass balance condition between the CR01 and
CR02 to maximize the run-time before the interlock
comes into play.
Revised Process Simulation
Based on the DoE study, two new scenarios were proposed
for the revised process simulation:
Scenario 1: (S01 Deck 1 =46 mm,
B02 =0.8,
B03 =0.8, CR01 CSS =50 mm,
CR02 CSS =20 mm)
Scenario 2: (S01 Deck 1 =46 mm,
B02 =0.75,
B03= 1.2, CR01 CSS =46 mm,
CR02 CSS =16 mm)
Scenario 1
Figure 5 shows the mass flow at different points in the cir-
cuit for the revised simulation Scenario 1. Both crusher
CR01 and CR02 are operating at 97% utilization for the
reference capacity. Figure 6 shows the different bin levels
and interlock signals for Scenario 1. In this configuration,
both the crushers are bottleneck depending on the duration
of operation. During the first half of the operation, the bin
level on B02 reached its limit and caused the interlock in
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
50
100
B01 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
50
100
B02 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
50
100
B03 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
50
100
B04 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
1 Interlock from B01 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
1 Interlock from B02 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
1
Interlock from B03 Level
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5
Time [s] 10 4
0
1 Interlock from B04 Level
Figure 4. Reference simulation result for bin levels and interlocks in the circuit
Level
[%]
Level
[%]
Level
[%]
Level
[%]
Signal
[-]
Signal
[-]
Signal
[-]
Signal
[-]
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